Offline Speech-to-Speech Translator on FPGA

Problem Statement

Offline speech translation is needed for low-connectivity environments and embedded assistive systems.

Objectives

• - Build full offline speech translator on FPGA plus MCU/SoC
• - Execute DSP front-end on FPGA
• - Run lightweight ASR/MT/TTS on MCU
• - Achieve near real-time phrase translation

Methodology

The project follows a structured implementation approach that includes Implement FFT and Mel pipeline, Integrate ASR/MT/TTS inference stack, Design FPGA to MCU protocol, and Validate complete speech input to translated output flow. These steps are executed iteratively to validate assumptions, improve performance, and ensure reliable delivery of the final solution.

Expected Outcome

By the end of this project, the team is expected to deliver Functioning offline translation demo, Demonstrated FPGA DSP plus embedded ML workflow, and Low-latency phrase translation. Together, these outcomes reflect both technical feasibility and practical value for demos, evaluation, and future scaling.

Future Scope

• - Additional languages and continuous speech
• - Improved TTS naturalness and ASR quality
• - Improved UI layers

Components and Budget